MOS transistor Tranzystor MOS -...

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MOS transistor

Tranzystor MOS

27 stycznia 2014 Wojciech Kucewicz 3

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Channel n

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𝑉𝑜𝑢𝑡𝑉𝑖𝑛

=𝑅1

𝑅1 + 𝑅𝑀

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)(THGSox

VVWCQ

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THGSox

VxVVWCxQ )()(

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vQI

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L

WC oxn

2)(

)(

)()(

2

0

)(

0)(

DSDSTHGSoxnD

THGS

Lx

x

VxV

xV oxnD

nTHGSoxD

nn

VVVV

L

WCI

dVVxVVWCdxI

dx

xdVVxVVWCI

dx

dVE

DS

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2

max, THGSDVVI

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Linear Resistance

At small VDS, the transistor can be viewed as a resistor, with the resistance depending on the gate voltage.

It finds application as an electronic switch.

THGSoxn

on

VVL

WC

R

1

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if VDS << 2(VGS − VTH)

2

)(2DS

DSTHGSoxnD

VVVV

L

WCI X

Application of Electronic Switches

In a cordless telephone system in which a single antenna is used for

both transmission and reception, a switch is used to connect either the

receiver or transmitter to the antenna.

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Effects of On-Resistance B.Razavi –Fundamentals of Microelectronics

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In the cordless phone, the switch connecting the transmitter to the antenna must negligibly attenuate the signal, e.g., by no more than 10%. If VDD = 1.8V, μnCox = 100 μA/V2, and VTH = 0.4 V, determine the minimum required aspect ratio of the switch. Assume the antenna can be modeled as a 50W resistor.

Effects of On-Resistance

Assuming minimal lenght of the channel L = 90 nm, W = 115µm

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1276

1

6,59,0

W

L

W

VVL

WC

R

RRR

R

V

V

THGSoxn

on

on

onant

ant

in

out

Effects of On-Resistance

To minimize signal attenuation, Ron of the switch has to be as small as possible. This means larger W/L aspect ratio and greater VGS.

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2

1

0

)(

0)(

)(2

1

)(1

THGSoxnD

THGS

Lx

x

VVxV

xV oxnD

VVL

WCI

dVVxVVWCdxITHGS

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Triode or Saturation?

When the region of operation is not known, a region is assumed (with an

intelligent guess). Then, the final answer is checked against the

assumption.

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Triode or Saturation?

Calculate the bias current of M1. Assume μnCox = 100 μA/V2 and VTH =

0.4 V. If the gate voltage increases by 10 mV, what is the change in the

drain voltage?

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VIRVV

AVVL

WCI

DDDDx

THGSoxnD

8,0

200)(2

1 2

VV

AI

x

D

766,0

7,206

DSTHGSoxnD VVVL

WCI 1

2

1 2

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and L

The channel length modulation factor can be controlled by the circuit designer.

For long L, the channel-length modulation effect is less than that of short L.

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How drain voltage afects drain current?

A MOSFET carries a drain current of 1 mA with VDS = 0.5 V in saturation. Determine the change in ID if VDS rises to 1V and λ = 0.1V−1.

What is the device output impedance?

mAV

VII

VVVL

WCI

VVVL

WCI

DS

DSDD

DSTHGSoxnD

DSTHGSoxnD

048,11

1

12

1

12

1

1

212

2

2

2

1

2

1

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The change in ID is 48 µA (<5%). The device output impedance:

W

k

I

Vr

D

DSo 42,10

000048,0

5,0

Transconductance

As a voltage-controlled current source, a MOS transistor can be characterized by its transconductance:

GS

Dm

V

Ig

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This quantity serves as a measure of the “strength” of the device: a higher value corresponds to a greater change in the drain current for a given change in VGS.

For saturation region:

1) Derivative 2) VGS – VTH = f(ID) 3) gm/ID

2)(2

1THGSoxnD VV

L

WCI

THGSoxnm VVL

WCg Doxnm I

L

WCg 2

THGS

Dm

VV

Ig

2

Transconductance

1)

2)

3)

These dependencies prove critical in understanding performance trends of MOS devices.

THGS

mDDmTHGS

THGS

Dm

mDDm

Doxnm

mTHGSTHGSm

THGSoxnm

VVgconstIIgconstVV

VV

Ig

L

WgconstIIgconst

L

W

IL

WCg

L

WgconstVVVVgconst

L

W

VVL

WCg

1;

2

;

2

;

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Doubling of gm due to doubling W/L

If W/L is doubled, effectively two equivalent transistors are added in parallel, thus doubling the current (if VGS-VTH is constant) and hence gm.

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2

12

1THDDoxnD

VVVL

WCI

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2

1

2

1

1

THGSoxnDS

Do

VVL

WCV

Ir

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D

oI

r

1

PMOS Transistor

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2,

2

,

22

1

12

1

DSDSTHGSoxptriD

DSTHGSoxpsatD

VVVVL

WCI

VVVL

WCI

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Small-Signal Model of PMOS Device

The small-signal model of PMOS device is identical to that of NMOS

transistor; therefore, RX equals RY and hence (1/gm)||ro.

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D

G

S

D

G

S

B

D

G

S

B

D

G

S

B

D

G

S

D

G

S

B

D

G

S

B

D

G

S

B

D

G

S

D

G

S

NMOS

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DSTHGSoxnD

THGSDS

DSDSTHGSoxnD

THGSDS

VVVL

WCI

VVV

VVVV

L

WCI

VVV

12

1

2)(

2

2

D

oI

r

1 THGSoxnm VV

L

WCg

PMOS

48

DSTHGSoxpD

THGSDS

DS

DSTHGSoxpD

THGSDS

VVVL

WCI

VVV

VVVV

L

WCI

VVV

12

1

2)(

2

2

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