intro CI [1]

19
1 Computer Una mala traducció : "Interfícies de Computadors" Int roducció Arquit ectura del micro menú Port s d'E /S Inte rrup cio ns Entrad es i sortid es im pulsio nals Interfí cies analòg iques Interfí cies de co municació sèrie Bus os i DMA

Transcript of intro CI [1]

Page 1: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 1/19

1

Computer

Una mala traducció : "Interfícies de Computadors"

• Introducció

• Arquitectura del micro

menú

• Ports d'E/S

• Interrupcions

• Entrades i sortides impulsionals

• Interfícies analògiques

• Interfícies de comunicació sèrie

• Busos i DMA

Page 2: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 2/19

2

Bibliografia

es transpar nc es un a ut per a segu ment e esclasses.

Les transparències NO SÓN la font bibliogràfica ni elmaterial d'estudi de l'assignatura.

Bibliografia

- Manual de referència tècnicahttp://ww1.microchip.com/downloads/en/DeviceDoc/39632e.pdf 

- Application noteshttp://www.microchip.com

- Llibres de textePIC Microcontroller: An Introduction to Software & Hardware Interfacing

Han-Way Huang , Leo Chartrand . Publisher: Delmar Cengage Learning; 2004

Page 3: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 3/19

3

Coneixements previs

Entre d'altres:

• Coneixement del funcionament dels diferentscomponents electrònics: R, L, C, diodes, transistorsMOS.

• Anàlisi de circuits electrònics en DC. Càlcul de

tensions, corrents i consums.• Programació en llenguatge C

• Entendre correctament documentació escrita enanglès.

Avaluació• Introducció

• Arquitectura del micro

• Ports d'E/S

• Interrupcions

• Entrades i sortides impulsionals

• Interfícies analògiques

prova contro

2ª prova control

3ª prova control• Interfícies de comunicació sèrie

• Busos i DMA4ª prova control

Page 4: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 4/19

4

Avaluació

- De les 4 proves control s'obté la nota de teoria NT

- De les pràctiques de laboratori s'obté la nota NL. La nota de laboratories modularà amb un examen de laboratori (NL=0.5NPR+0.5NEXL).

- La nota final s'obté: NF = 0'5NT + 0'5NL

- Només excepcionalment es farà un examen final d'on sobtindrà la'.

final, ho haurà de solicitar per escrit al coordinador de l'assignaturaabans de la segona setmana de curs.

- És condició necessària per superar l'assignatura realitzar i presentarcorrectament les pràctiques de laboratori.

Avaluació (laboratori)És condició necessària per superar l'assignatura realitzar i presentar

correctament les pràctiques de laboratori.

Això vol dir:

- a er a pr c ca o a e na que es emana a ans e a sess elaboratori corresponent.

- L'assistència al laboratori és obligatòria. Cal asssitir al grup al qual

esteu assignats.- A l'inici de la sessió s'haurà d'entregar la feina realitzada a casa.

- Durant la sessió de laboratori caldrà resoldre correctament lesmodificacions i/o preguntes que el professor demani sobre lapràctica.

- En les proves de control es faran preguntes sobre la pràctica.

Podeu escollir fer les pràctiques en parelles o en grups de 2.

Page 5: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 5/19

5

Avaluació (competència transversal)G3.1 - Comprendre i utilitzar eficaçment manuals, especificacions de

productes i altra informació de caràcter tècnic escrita en anglès.

(Nivell de desenvolupament: en profunditat) .

- Té un 10% del pes sobre l'avaluació de l'assignatura.

Aquest % és aproximat i es correspon als coneixements que se ussuposen pel fet d'haver de treballar amb documentació esrita enanglès.

- A part, cal avaluar la competència per si sola amb una nota.Avaluació??????????

La competència "llengua estrangera" és l'única necessària per al'obtenció del títol d'enginyer. (normativa UPC)

6 ECTS * 25hores/ECTS = 150 hores de feina

...a la bolonyesa

==

feina/setmana

2 hores/setmana de classe de teoria (presencial)

+ 2 hores/setmana de laboratori (presencial)

+ 6 hores/setmana de treball personal

“I hear and I forget.

I see and I remember.

I do and I understand”

Confucio

Page 6: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 6/19

6

Assistència a classeLa diferència entre no venir a classe

Encoder incremental d’un ratolí mecànic de bola

Assistència a classei venir a classe Diode fotoreceptor 

+ foto emissor (a l’altre costat)

sempre encèsLa relació entre el nombre de finestretes

i el perímetre de l’eix ens donarà la resolució

Rodeta

dentada

(anomenada

encoder 

incremental)

Això és texte per omplir hjgsdfjhdsfdjd.sd

dsndsfdsfjd dfjndsddfjbvd vnd dnf bbfedf dfdn fnd fje ekween

fkwe fkd d dkjbndsdkfjhdsjkf dsf 

dfd fdf dfd djfdjfdfdhjgsdfjhdsfdjd.sddsndsfdsfjd dfjndsddfjbvd vnd dnf bbfe

df dfdn fnd fje ekweenfkwe fkd d dkjbndsdkfjhdsjkf dsf 

dfd fdf dfd djfdjfdfd

hjgsdfjhdsfdjd.sd

dsndsfdsfjd dfjndsddfjbvd vnd dnf bbfedf dfdn fnd fje ekween

fkwe fkd d dkjbndsdkfjhdsjkf dsf dfd fdf dfd djfdjfdfd

hjgsdfjhdsfdjd.sd

Encoder incremental d’un ratolí mecànic de bola

Dos díodes per obtenir senyal

en quadratura.El desfasament ens donarà el sentit de gir.

Eix en contacte amb la bola

dsndsfdsfjd dfjndsd

dfjbvd vnd dnf bbfedf dfdn fnd fje ekween

fkwe fkd d dkjbndsdkfjhdsjkf dsf dfd fdf dfd djfdjfdfd

Page 7: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 7/19

7

Introduction

Definitions of “interface” from Webster’s Dictionary:noun: the place at which independent systems meet and act or 

communicate with each other.

Interfaces & interfacing

e.g. (1) human - machine interface

(2) Digital - analogue interface

(3) Digital - digital interface

TTL - CMOS interface

Parallel - Serial interface

Page 8: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 8/19

8

System level interfaces

Human-MachineInterface

-

Digital-

InterfaceAnalogue

HumanUsers

AnalogueEnvironment

Human-machine interface:Input devices: keyboard, mouse, microphone, cameraOutput devices: CRT, printer, light panel, audio amp.

Digital - Analogue Interface:In ut devices: A/D converters modems sensors

 

Other Digital Systems

 

Output devices: D/A converters, modems, transducers,actuators, stepper motors

Control devices: switches, multiplexers, amplifiers, attenuators

Digital - Digital Interface:Connectors: wires, ribbon cable, coax, twisted pair, PCBI/O devices: buffers, level-shifters, synchronizers

Interfaces & interfacing

Informal Definition The h sical electrical and lo ical means of exchan in  

Information with a functional module.

The process of enabling a computer to communicate ,

and Protocols.

Page 9: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 9/19

9

Why is computer interfacing so

important?1. The human-machine interface determines the ultimate

success or failure of many computer based systems(Apple iPhone)

2. Digital systems exist within and must successfully

interact with an analogue natural environment. Digital-Analogue interfaces are unavoidable

. at er t an es gn ng g ta systems rom e ementarycomponents, computer engineers more typicallyassemble new systems from existing sub-systems.

Typical interfacing activities

1. Selecting software/hardware subsystems that can (at least potentially)interact well with each other.

A ro riate D/A andA/D converters s eed accurac …  Serial vs. parallel communication.

2. Determining appropriate hardware connections: Cabling, connectors, drivers, receivers, correct termination, etc.

3. Resolving any hardware incompatibilities. CMOS with TTL

4. Configuring hardware interfaces correctly using low-level softwaredrivers.

LCD, Keypads in embedded systems.

5. Interfacing software components correctly; Selecting compatible software versions; Calling the correct procedures in the correct sequence with the correct

parameters.

Page 10: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 10/19

10

Typical Mechanisms at Interfaces

2) Synchronization, handshaking

1) Data buffering and flow control-- helps compensate for short-term mismatches in

data generation and consumption rates-- groups data into larger, more efficient chunks

-- ,affecting synchronous signals, devices withdifferent response times

-- bit stuffing to equalize bit rates (telecom technique)

-- framing, packet assembly and disassembly3) Digital processing

-- error detection and error correction-- encoding, decoding, code conversion-- data communication protocols

-- data compression (e.g. using Huffman codes)

4) Analogue signal conversion and conditioning-- restore correct voltage and current levels-- restore correct signal rise and fall times

-- take precautions to reduce noise and reflections-- carrier modulation and demodulation

-- pulse-shaping and channel equalization

Hardware interfaces within a PC(greatly simplified)

Lab Board

CPU

MemoryController 

Hard Disc

MainMemory

Cache

SerialPort

Controller 

Keyboard

Mouse

ParallelPort

DisketteController 

DisketteDrive

Drive Controller   Controller 

VideoController 

CRT

System Bus

Page 11: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 11/19

11

Microcomputer: 5 basic units

The Arithmetic Logic Unit (ALU)

Control Unit: directs the operation of all other parts.

emory: ore program a a

Input: Allows data & info to be entered into memory

Output: Transfers data from memory to outside world

The central processing unit (CPU)

CPU executes programinstructions

rogram counter sa special register thatpoints to the instructions

Instruction decoder tellsthe ALU what to do withthe data

Control sequencermanages the transfer of instruction and databytes along the internaldata bus

Page 12: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 12/19

12

The microcomputer system

MicroComputer has 3basic parts connected

CPU Memory Registers

I/O registers data, control, status

I/O port is a collectionof I/O pins on the chipthat represents a unit of data

Single chip computer

Page 13: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 13/19

13

I/O Controller

I/O Addressing

If the same address bus is used for both memory and I/O, how

should the hardware be designed to differentiate between

memory and I/O reads and writes?

CPU MemoryI/O

Interface

Data

Address

Control

Page 14: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 14/19

14

Memory Mapped I/O vs. Isolated I/O

Memory Mapped I/O (MOTOROLA):

1. Any instruction that reads or writes memory can read/write I/O Port

. , , , ,communicate with the processor

3. Ex: LDAA #56 STAA $0024 (copy value to port H)

Isolated I/O (INTEL):

1. The control bus signals that activate the I/O are separate from those that activatethe memory device.

2. These systems have a separate address space.3. Separate instructions are used to access I/O and Memory.

4. Ex: IN AL, $10 (copy values of port $10 into register AL)

Advantages/Disadvantages?

Memory mapped I/O

Page 15: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 15/19

15

Memory mapped I/O

PICs use amemory mappedsolution

Semiconductor memory

• Random-access memory (RAM): Read/write• Read-only memory (ROM): can only be read but not written to by the processor

an om-access memory

• Dynamic random-access memory (DRAM): need periodic refresh

• Static random-access memory (SRAM): no periodic refresh is required

Read-only memory

• as -programme rea -on y memory ( ): programme w en e ng manu acture• Programmable read-only memory (PROM): can be programmed by the end user

Page 16: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 16/19

16

Erasable programmable ROM (EPROM)

1. electrically programmable many times2. erased by ultraviolet light (through a window)

Semiconductor memory

3. erasable in bulk (whole chip in one erasure operation)

Electrically erasable programmable ROM (EEPROM)

1. electrically programmable many times2. electrically erasable many times3. can be erased one location, one row, or whole chip in one operation

Flash memory

1. electrically programmable many times2. electrically erasable many times3. can only be erased in bulk (either a block or the whole chip)

RISC CISC

Sim le instruction set Complex instruction set

RISC vs. CISC

Regular and fixed instruction format

Simple address modes

Separated data and program memory

Most operations are register to register

Irregular instruction format

Complex address modesCombined data and program memory

Most operations can be register to memory

Take shorter time to design and debug

Provide large number of CPU registers

Simple operations, longer programsEFFICIENCY?

Take longer time to design and debug

Provide smaller number of CPU registers

Complex operations, shorter programsEFFICIENCY?

Page 17: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 17/19

17

Example of a simple input operation

Input

CPU

OR

Sensor 

PortData

Transfer 

or sRegister 

Example of a simple output operation

Output Port

CPU

Instrument

Panel Port’s

Data

Transfer 

Register 

Page 18: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 18/19

18

Example of a simple input operation

Speed Signal Set Counter to count

on ed es

Counter 

CPUSpeed

Sensor 

 CPU

reads

counter 

at every

time

interval

Timer 

Program timer’s

interrupt interval

1. No method- Input: The interface returns the current value of the input pins.

Synchronizing with I/O Devices

- Output: The interface drives the data written by the CPU directly on output pins.

2. Strobe method

- A strobe signal is used to synchronize data transfer.- Input: The input device places data on input pins, wait until data is stable, and then

asserts the strobe signal to inform the interface chip to latch the data.- Output: The interface drives data to be output on the output pins, wait until data is

s a e, an en asser s e s ro e s gna o n orm e ou pu ev ce o a c e a a.

3. Handshake method- Two handshake signals are used to synchronize the data transfer between the interface

and I/O device. H1 is driven by interface and H2 is driven by I/O device.- There are two versions of handshaking: pulse mode and interlock mode.

Page 19: intro CI [1]

8/7/2019 intro CI [1]

http://slidepdf.com/reader/full/intro-ci-1 19/19

H1

Input handshaking

Valid DataData

H2

(a) Interlocked

H1

H2

Data Valid Data

(b) Pulse mode

Figure 7.3 Input Handshakes

H1

Output handshaking

Valid Data

(a) Interlocked

H2

Data

H1

Valid Data

(b) Pulse Mode

H2

Data

Figure 7.4 Output Handshaking