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Ashra CMOS Fi ne I mage Sensor
Jan. 8, 2004, @U. of Hawaii
Yasuo Arai (KEK)
I ntroducti on
Sensor Archi tecture
Pi xel Structure
Si gnal Si mul ati on
Schedul e
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I ntroducti on (1)
CMOS sensor technology is rapidly progressing. It has many
advantages compared with CCD technology; It is possible to integrate with logics (High Performance).
Commercial process is usable (Low Cost).
It works in low voltage (Low Power). Higher S/N becomes achievable with circuit technologies
(close to CCD).
High-speed readout is possible with pipeline and/or paralleltechniques.
However existing CMOS sensor has;
A global shutter -> to cover large FOV, shutters for small regionsare necessary to avoid unwanted light background.
< 10 frames/sec -> higher readout rate (~1,000 event/sec) isrequired to reduce trigger threshold. We should read out onlyinteresting parts of sensor.
Develop New CMOS sensor !
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I ntroducti on (2)
6060cmcm44cmcm
Fi ne I mage Sensori ne I mage Sensor 2, 048 x 2, 048 pi xel s) 2, 048 x 2, 048 pi xel s)X-Y address
Lens I . I .ens I . I .
Tri gger Sensorri gger Sensor128 x 128 pads)128 x 128 pads)
To achi eve 1 arcmi n resol uti on, 3, 000x3, 000 pi xel s are requi red,
but we sel ect 2, 048x2, 048 pi xel s (1. 5 arcmi n) f i ne i mage sensor(AFS-1) as a real i sti c sol uti on at present stage.
2-D sel ectabl e (128 x 128 regi ons) exposure to reduce background
noi se. 2-D sel ectabl e (128 x 128 regi ons) readout to reduce deadti me.
Overl appi ng exposure for tri ggered regi on shoul d be possi bl e.
Use advanced CMOS process (0. 25 m) to get l arge aperture.
Amp I . I .mp I . I . Del ay I . I .
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AFS-1 Structure
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Overlapping Imaging
Imaging region should be larger than the triggered region tocompensate misalignment.
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Region Control Logics
A trigger region is composed of 16x16 pixels.
Imaging region has 20x20 pixels, thus 4 pixels overlap withadjacent region.
Readout is done for each sub regions.
Same logics in X-direction
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An example of 2-D CMOS Active Pixel
reset
store
amplify
select
Pi xel use onl y NMOS Tr.Vcontrol >Vdd +0. 8V.
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A Toy simulation of Light Exposure with a Delay I.I.
TriggerDecisionReadout
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Naive Extension of 4T cell to 2-D-
No. of Trasnsistors : 4 -> 6Tr
No. of Control Line : 3 -> 5lines.
Cvd is too large !
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Naive Extension of 6T cell to 2-D-
No. of Trasnsistors : 6-> 9Tr
No. of Control Line : 5-> 8lines.
Too Complex ?
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2004.1.8, Ashra Collab. Mtg@Hawaii 12
New Structure (APix-9) being investigated
No. of Trasnsistors : 6
-> 9
TrNo. of Control Lines : 8 -> 6 lines.
APi 9 Si l ti
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APix-9 Simulation
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Limitation in Control
Only continuous exposure is allowed.
Pipeline operation is possible, but shutter must be open untilprevious readout is finished.
Mirror images are generated if multiple X and Y addresses are
supplied.
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AFS-1 Specifications(Preliminary)
aram eter S pecificationShutter types 2-D (128 x 128 regions, 20 pix by 20 pix,
4 pix overlap)
Readout Unit 2-D (256 x 256 regions)
Pixel size ~12um x ~12um
Resolution 2,048 x 2,048 pixels
Pixel rate 33 M pix/s x 2
C onversion gain ~10uV/electron@ Pixel
Peak Q E*FF ~ 30% (average ~ 25%)
O ptical cross talk < 10%
D ark Current < 10,000 e-/sec
Noise electron < 100 e-
Saturation charge > 100,000 e-
Spectral sensitivity range 400 - 1000 nm
ADC 33M Hz 10 bit x 2
Pow er dissipation < 400 m W
S h d l
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Schedule
Sensor: FillFactory
~Feb. 2004: Agreement on Statement Of Work. ~Mar. 2004: Quotation and Contract.
Fall 2004: Design finish.
Early 2005: Sensor fabrication finish. Spring 2005: Evaluation finish.
Peripheral I/O: Toshiba DMS
~Mar. 2004: Learn FillFactory sensor
control with an evaluation kit. ~Apr. 2004: Design and production of
prototype readout modules for LUPA-4000sensor.
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LUP
PC
M other BoardSystemP.S.
BUFLV DS S/PTr/Rc
Memory
RO M
C om m unicationLSI
Cable
SensorP.S.
ToLUPA4000Sensor Module
2x2(2ch)
3 8x8
uC
Copyright 2002-2003 Toshiba Design & Manufacturing Service Corporation All rights reserved.
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LUPA4000Sensor ModuleLUPA4000
LVDS Seriarizer
10
102
2
SPI3
Sensor Control
14
Sensor Module
LVDS Seriarizer
22
3
2
1LVDS
LVDS1
Sensor
Control
P.S.
(ch1)
(ch2)
Sensor Control Board
Copyright 2002-2003 Toshiba Design & Manufacturing Service Corporation All rights reserved.
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Summary
Architecture of Ashra Fine Sensor is being studied
(2,048x2,048 pixels, 2-D control of exposure and readout).
Discussion with FillFactory for the sensor development has been
started.
Several pixel structures are studied and simulated. Present
candidate is 9 Tr pixel (APix-9).
A prototype readout module is being developed by Toshiba DMS.
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